1 . In Reverse Polish notation, expression A* B+C* D is written as

(A)AB*CD*+ (B) A* BCD*+

(C) AB*CD+* (D) A* B*CD+

Ans: A

2. SIMD represents an organization that .

A) refers to a computer system capable of processing several programs at the same time.

B) represents organization of single computer containing a control unit, processor unit and a memory

C) includes many processing units under the supervision of a common control unit

D) none of the

Ans: C

3. Floating point representation is used to store

(A) Boolean values (B) whole numbers

(C) real integers (D) integers

Ans: C

4. Suppose that a bus has 16 data lines and requires 4 cycles of 250 nsecs each to transfer data. The bandwidth of this bus would be 2 Megabytes/sec. If the cycle time of the bus was reduced to 125 nsecs and the number of cycles required for transfer stayed the same what would the bandwidth of the bus?

(A) 1 Megabyte/sec (B) 4 Megabytes/sec

(C) 8 Megabytes/sec (D) 2 Megabytes/sec

Ans: D

5. Assembly language

A uses alphabetic codes in place of binary numbers used in machine language

B is the easiest language to write programs

C need not be translated into machine language

D None of these

Ans: A

6. In computers, subtraction is generally carried out by

(A) 9’s complement (B) 10’s complement

(C) 1’s complement (D) 2’s complement

Ans: D

7. The amount of time required to read a block of data from a disk into memory is composed of seek time, rotational latency, and transfer time. Rotational latency refers to

A the time its takes for the platter to make a full rotation

B the time it takes for the read-write head to move into position over the appropriate track

C the time it takes for the platter to rotate the correct sector under the head

D none of the above

Ans: A

8. What characteristic of RAM memory makes it not suitable for permanent storage?

(A) too slow (B) unreliable

(C) it is volatile (D) too bulky

Ans: C

9. Computers use addressing mode techniques for .

A giving programming versatility to the user by providing facilities as pointers to memory counters for loop control

B to reduce no. of bits in the field of instruction

C specifying rules for modifying or interpreting address field of the instruction

D All the above

Ans: D

10. The circuit used to store one bit of data is known as

(A) Register (B) Encoder

(C) Decoder (D) Flip Flop

Ans: D

11 (2FAOC)16 is equivalent to

(A) (195 084)10 (B) (001011111010 0000 1100)2

(C) Both (A) and (B) (D) None of these

Ans: B

12. The average time required to reach a storage location in memory and obtain its contents is called the
(A) seek time (B) Turn around time

(C) access time (D) transfer time

Ans: C

13. Which of the following is not a weighted code?

(a) Decimal Number system (B) Excess 3-cod

(C) Binary number System (D) None of these

Ans: B

14. The idea of cache memory is based

A on the property of locality of reference

B on the heuristic 90-10 rule

C on the fact that references generally tend to cluster

D all of the above

Ans: A

15 Register keeps track of the instructions stored in program stored in

(A) AR (Address Register) (B) XR (Index Register)

(C) PC (Program Counter) (D) AC (Accumulator)

Ans: C

16 The addressing mode used in an instruction of the form ADD X Y, is

(A)Absolute (B) indirect

(C) index (D) none of these

Ans: C

17. If memory access takes 20 ns with cache and 110 ns with out it, then the ratio ( cache uses a 10 ns memory) is

(A) 93% (B) 90%

(C) 88% (D) 87%

Ans: B

18. In a memory-mapped I/O system, which of the following will not be there?

(A) LDA (B) IN

(C) ADD (D) OUT

Ans: A

19. In a vectored interrupt.

A the branch address is assigned to a fixed location in

B the interrupting source supplies the branch information to the processor through an interrupt

C the branch address is obtained from a register in the processor

D none of the above

Ans: B

20 .Von Neumann architecture is

A) SISD (B) SIMD

C) MIMD (D) MISD

Ans: A

21. The circuit used to store one bit of data is known as

A) Encoder (B) OR gate

(C) Flip Flop (D) Decoder

Ans C

22.Cache memory acts between

A)CPU and RAM (B) RAM and ROM

(C) CPU and Hard Disk (D) None of these

Ans: A

23. Write Through technique is used in which memory for updating the data

A) Virtual memory (B) Main memory

(C) Auxiliary memory (D) Cache memory

Ans: D

24.Generally Dynamic RAM is used as main memory in a computer system as it

A) Consumes less power (B) has higher speed

(C) has lower cell density (D) needs refreshing circuitary

Ans: B

25. In signed-magnitude binary division, if the dividend is (11100)2 and divisor is (10011)2 then the result is

(A) (00100)2 (B) (10100)2

(C) (11001)2 (D) (01100)2

Ans: B

26.Virtual memory consists of

A) Static RAM (B) Dynamic RAM

(C) Magnetic memory (D) None of these

Ans: A

27. In a program using subroutine call instruction, it is necessary

A)initialise program counter

B)Clear the accumulator

C)Reset the microprocessor

D)Clear the instruction register

Ans: D

28. A Stack-organised Computer uses instruction of

A) Indirect addressing (B) Two-addressing

(C) Zero addressing (D) Index addressing

Ans: C

29. If the main memory is of 8K bytes and the cache memory is of 2K words. It uses associative mapping. Then each word of cache memory shall be

A)11 bits (B) 21 bits

(C) 16 bits (D) 20 bits

Ans: C

30. A-Flip Flop can be converted into T-Flip Flop by using additional logic circuit

A)D = T Qn

(B)D = T

(C) D = T . Qn

(D) D = T Å Qn

Ans: D

31.Logic X-OR operation of (4ACO)H & (B53F)H results

A) AACB (B) 0000

(C) FFFF (D) ABCD

Ans: C

32. When CPU is executing a Program that is part of the Operating System, it is said to be in

• 35. The main memory in a Personal Computer (PC) is made of
• A)fcache (B) static RAM

(C) Dynamic Ram (D) both (A) and (B).

Ans: D

36. In computers, subtraction is carried out generally by

A 1’s complement method

B 2’s complement method

C signed magnitude method

D BCD subtraction method

Ans: B

37. PSW is saved in stack when there is a

A) interrupt recognised

B) execution of RST instruction

C) Execution of CALL instruction

D ) All of these

Ans: A

38. The multiplicand register & multiplier register of a hardware circuit implementing booth’s algorithm have (11101) & (1100). The result shall be

(A) (812)10 (B) (-12)10

(C) (12)10 (D) (-812)10

Ans: A

39. The circuit converting binary data in to decimal is

A) Encoder (B) Multiplexer

(C) Decoder (D) Code converter

Ans: D

40. A three input NOR gate gives logic high output only when

A) one input is high (B) one input is low

(C) two input are low (D) all input are high

Ans: D

• n bits in operation code imply that there are possible distinct operators
  • 2n (B) 2n

(C) n/2 (D) n2

Ans: B

register keeps tracks of the instructions stored in program stored in

A) AR (Address Register) (B) XR (Index Register)

(C) PC (Program Counter) (D) AC (Accumulator)

Ans: C

• Memory unit accessed by content is called
  • Read only memory (B) Programmable Memory

(C) Virtual Memory (D) Associative Memory

Ans: D

• ‘Aging registers’ are
  • Counters which indicate how long ago their associated pages have been referenced.
  • Registers which keep track of when the program was last
  • Counters to keep track of last accessed
  • Counters to keep track of the latest data structures

Ans: A

• Translation from symbolic program into Binary is done in
  • Two (B) Directly

(C) Three passes. (D) Four passes.

Ans: A

• A floating point number that has a O in the MSB of mantissa is said to have
  • Overflow (B) Underflow

(C) Important number (D) Undefined

Ans: B

• The BSA instruction is
  • Branch and store accumulator
  • Branch and save return address
  • Branch and shift address
  • Branch and show accumulator

Ans: B

• State whether True or

• Arithmetic operations with fixed point numbers take longer time for execution as compared to with floating point

Ans: True.

• An arithmetic shift left multiplies a signed binary number by

Ans: False.

• Logic gates with a set of input and outputs is arrangement of
  • Combinational circuit (B) Logic circuit

(C) Design circuits (D) Register

Ans: A

• MIMD stands for
  • Multiple instruction multiple data
  • Multiple instruction memory data
  • Memory instruction multiple data
  • Multiple information memory data

Ans: A

• A k-bit field can specify any one of
  • 3k registers (B) 2k registers

(C) K2 registers (D) K3 registers

Ans: B

• The time interval between adjacent bits is called the
  • Word-time (B) Bit-time

(C) Turn around time (D) Slice time

Ans: B

• A group of bits that tell the computer to perform a specific operation is known as
  • Instruction code (B) Micro-operation

(C) Accumulator (D) Register

Ans: A

• The load instruction is mostly used to designate a transfer from memory to a processor register known as
  • Accumulator (B) Instruction Register

(C) Program counter (D) Memory address Register

Ans: A

• The communication between the components in a microcomputer takes place via the address and
  • I/O bus (B) Data bus

(C) Address bus (D) Control lines

Ans: B

• An instruction pipeline can be implemented by means of
  • LIFO buffer (B) FIFO buffer

(C) Stack (D) None of the above

Ans: B

• Data input command is just the opposite of a
  • Test command (B) Control command

(C) Data output (D) Data channel

Ans: C

• A microprogram sequencer
  • generates the address of next micro instruction to be
  • generates the control signals to execute a
  • sequentially averages all microinstructions in the control
  • enables the efficient handling of a micro program

Ans: A

• A binary digit is called a
  • Bit (B) Byte

(C) Number (D) Character

Ans: A

• A flip-flop is a binary cell capable of storing information of
  • One bit (B) Byte

(C) Zero bit (D) Eight bit

Ans: A

• The operation executed on data stored in registers is called

• Self-contained sequence of instructions that performs a given computational task is called
  • Function (B) Procedure

(C) Subroutine (D) Routine

Ans: A

• Microinstructions are stored in control memory groups, with each group specifying a
  • Routine (B) Subroutine

(C) Vector (D) Address

Ans: A

• An interface that provides a method for transferring binary information between internal storage and external devices is called

• Physical address (B) Logical address

(C) Memory address (D) Word address

Ans: A

• If the value V(x) of the target operand is contained in the address field itself, the addressing mode is
  • (B) direct.

(C) indirect. (D) implied.

Ans: B

Q.70 can be represented in a signed magnitude format and in a 1’s complement format as

(A) 111011 & 100100 (B) 100100 & 111011

(C) 011011 & 100100 (D) 100100 & 011011

Ans: A

• The instructions which copy information from one location to another either in the processor’s internal register set or in the external main memory are called
  • Data transfer (B) Program control instructions.

(C) Input-output instructions. (D) Logical instructions.

Ans: A

• A device/circuit that goes through a predefined sequence of states upon the application of input pulses is called
  • register (B) flip-flop

(C) transistor. (D) counter.

Ans: D

• The performance of cache memory is frequently measured in terms of a quantity called
  • Miss (B) Hit ratio.

(C) Latency ratio. (D) Read ratio.

Ans: C

• The information available in a state table may be represented graphically in a
  • simple (B) state diagram.

(C) complex diagram. (D) data flow diagram.

Ans: B

• Content of the program counter is added to the address part of the instruction in order to obtain the effective address is
  • relative address (B) index addressing mode.

(C) register mode. (D) implied mode.

Ans: A

• An interface that provides I/O transfer of data directly to and form the memory unit and peripheral is termed as
  • (B) Serial interface.

(C) BR. (D) DMA.

Ans: D

• The 2s compliment form (Use 6 bit word) of the number 1010 is

(A) 111100. (B) 110110.

(C) 110111. (D) 1011.

Ans: B

• A register capable of shifting its binary information either to the right or the left is called a
  • parallel (B) serial register.

(C) shift register. (D) storage register.

Ans: C

• What is the content of Stack Pointer (SP)?
  • Address of the current instruction
  • Address of the next instruction
  • Address of the top element of the stack
  • Size of the

Ans: C

• Which of the following interrupt is non maskable
  • (B) RST 7.5.

(C) RST 6.5. (D) TRAP.

Ans: D

• Which of the following is a main memory
  • Secondary (B) Auxiliary memory.

(C) Cache memory. (D) Virtual memory.

Ans: C

• Which of the following are not a machine instructions
  • (B) ORG.

(C) END. (D) (B) & (C).

Ans: D

• In Assembly language programming, minimum number of operands required for an instruction is/are
  • (B) One.

(C) Two. (D) Both (B) & (C).

Ans: A

• The maximum addressing capacity of a micro processor which uses 16 bit database & 32 bit address base is

(A) 64 K. (B) 4 GB.

(C) both (A) & (B). (D) None of these.

Ans: B

• The memory unit that communicates directly with the CPU is called the
  • main memory (B) Secondary memory

(C) shared memory (D) auxiliary memory.

Ans: A

• The average time required to reach a storage location in memory and obtain its contents is called
  • Latency (B) Access time.

(C) Turnaround time. (D) Response time.

Ans: B State True or False

• A byte is a group of 16

Ans: False

• A nibble is a group of 16

Ans: False

• When a word is to be written in an associative memory, address has got to be

Ans: False

• When two equal numbers are subtracted, the result would be and not .

Ans: +ZERO, -ZERO.

• A development system and an are essential tools for writing large assembly language

Ans: Microprocessor, assembler

• In an operation performed by the ALU, carry bit is set to 1 if the end carry C8 is

. It is cleared to 0 (zero) if the carry is .

Ans: One, zero

Choose the correct alternative

• A successive A/D converter is
  • a high-speed (B) a low speed converter.

(C) a medium speed converter. (D) none of these.

Ans: C

• When necessary, the results are transferred from the CPU to main memory by
  • I/O (B) CPU.

(C) shift registers. (D) none of these.

Ans: B

• The gray code equivalent of (1011)2is

(A) 1101. (B) 1010.

(C) 1110. (D) 1111.

Ans: C

QQQQ….99996666

A combinational logic circuit which sends data coming from a single source to two or more separate destinations is

(A) Decoder. (B) Encoder.

• (D) Demultiplexer.

Ans: D

• In which addressing mode the operand is given explicitly in the instruction
  • (B) Immediate.

(C) Indirect. (D) Direct.

Ans: B

• A stack organized computer has
  • Three-address (B) Two-address Instruction.

(C) One-address Instruction. (D) Zero-address Instruction.

Ans: D

• A Program Counter contains a number 825 and address part of the instruction contains the number 24. The effective address in the relative address mode, when an instruction is read from the memory is

(A) 849. (B) 850.

(C) 801. (D) 802.

Ans: B

• A system program that translates and executes an instruction simultaneously is
  • (B) Interpreter.

(C) Assembler. (D) Operating system.

Ans: C

• The cache memory of 1K words uses direct mapping with a block size of 4 words. How many blocks can the cache
  • 256 (B) 512 words.

(C) 1024 words. (D) 128 words.

Ans: A

• A page fault
  • Occurs when there is an error in a specific
  • Occurs when a program accesses a page of main
  • Occurs when a program accesses a page not currently in main
  • Occurs when a program accesses a page belonging to another

Ans: C