Comparison of Logic families are here:
| logic familly | RTL |
| Fan-in | 4 |
| Fan-out | 4 |
| Propogation time (nsec) | 12 TO 30 |
| Clock rate(Mhz) | 5 |
| Power Dissipation(MW) | 15 |
| Noise margin(volts) | 0.2 TO 0.4 |
| Cost | low |
| Advantages | Low power dissipation |
| Disadvantages | Low speed, low fan out |
| logic familly | DTL |
| Fan-in | 10 |
| Fan-out | 8 |
| Propogation time (nsec) | 30 |
| Clock rate(Mhz) | 10 |
| Power Dissipation(MW) | 12 |
| Noise margin(volts) | 0.7 |
| Cost | low |
| Advantages | Low power dissipation |
| Disadvantages | Low speed |
| logic familly | TTL |
| Fan-in | 8 |
| Fan-out | 10 |
| Propogation time (nsec) | 5 TO 15 |
| Clock rate(Mhz) | 15 |
| Power Dissipation(MW) | 10 |
| Noise margin(volts) | 0.4 |
| Cost | low |
| Advantages | Low power dissipation, low cost, high fan-out, high speed |
| Disadvantages | Susceptible to transients |
| logic familly | ECL |
| Fan-in | 5 |
| Fan-out | 16 TO 20 |
| Propogation time (nsec) | 2 TO 4 |
| Clock rate(Mhz) | 200 |
| Power Dissipation(MW) | 50 |
| Noise margin(volts) | 0.4 |
| Cost | HIGH |
| Advantages | Low noise, high fan-out, high speed |
| Disadvantages | High cost interfacing problems |
| logic familly | IIL |
| Fan-in | 5 |
| Fan-out | 8 |
| Propogation time (nsec) | 1 |
| Clock rate(Mhz) | 300 |
| Power Dissipation(MW) | 0.1 |
| Noise margin(volts) | 0.35 |
| Cost | LOW |
| Advantages | Low power dissipation, low cost |
| Disadvantages | Low fan out |
| logic familly | PMOS |
| Fan-in | 8 |
| Fan-out | 20 |
| Propogation time (nsec) | 50 |
| Clock rate(Mhz) | 2 |
| Power Dissipation(MW) | 1 |
| Noise margin(volts) | 0.4 |
| Cost | MEDIUM |
| Advantages | Low power dissipation, high fan out |
| Disadvantages | Low speed |
| logic familly | CMOS |
| Fan-in | 8 |
| Fan-out | 50 |
| Propogation time (nsec) | 70 |
| Clock rate(Mhz) | 10 |
| Power Dissipation(MW) | 0.01 |
| Noise margin(volts) | 5 |
| Cost | MEDIUM |
| Advantages | Low power dissipation, high fan out |
| Disadvantages | very low speed |