Microprocessor Mcq Set 1


IMPORTANT MICROPROCESSOR MCQ FOR EXAM

1. EPROM can be
a. UVPROM
b. EEPROM
c. both UVPROM and EEPROM
d. none of the above
Ans. (c);
EPROM – Erasable Programmable ROM
UVPROM – Ultraviolet Programmable ROM EEPROM – Electrically Erasable Programmable


2. The access time of ROM using bipolar transistors is about
a. 1 sec
b. 1 mili sec
c. 1 μ sec
d. 1 n sec
Ans. (c)
Access time is the time taken to read a stored word after applying address bits. Bipolar memories have faster access time than MOS memories.
Typical MOS EPROM has access time of 450 n sec.
Bipolar PROM has 80 n sec.
So, option (c) is most appropriate


3. The density of dynamic RAM is
a. the same as static RAM
b. less than that of static RAM
c. more than that of static RAM
d. either equal or less than that of static RAM
Ans. (c);
DRAMS have the advantage of
(i) Low power
(ii) High capacity (better integration)
(iii) Lower cost
Disadvantages are
(i) Slower speed
(ii) Need for refreshing
Also, SRAM cells are FFs while DRAM cells are capacitors.


4. Which memory requires periodic recharging
a. All ROMS
b. ALL RAMS
c. Static RAM
d. Dynamic RAM
Ans. (d);
D-RAMs, needs periodic refreshing


5. RAM can be expanded to
a. increase word size
b. increase word number
c. increase word size or increase word number
d. none of above
Ans. (c);
Both memory capacity and word size can be increased.


6. Which memory is available in all technologies
a. PROM
b. EEPROM
c. ROM
d. EPROM
Ans. (a);
PROM is available in all technologies.


7. Which memory does not require programming equipment
a. RAM
b. EPROM
c. EEPROM
d. UVPROM
Ans. (a);
RAM does not require any programming equipment.


8. The internal structure of PLA is similar to
a. RAM
b. ROM
c. both RAM and ROM
d. neither RAM nor ROM
Ans.(d);
Note, that PLA has programmable AND array whose product term output feeds a programmable OR array .So the structure is not like a RAM or ROM.


9. As access time is decreased, the cost of memory
a. remains the same
b. increases
c. decreases
d. may increase of decrease
Ans. (b);
As the access time of memory is decreased its cost will increase. Fast memories are costly.


10. Choose the correct statements(s) from the following
a. PROM contains a programmable AND array and a fixed OR array.
b. PLA contains a fixed AND array and a programmable OR array.
c. PROM contains a fixed AND array and a programmable OR array.
d. PLA contains a programmable OR array

Ans. (d);
PLA has both AND & OR arrays as programmable


11. A PLA can be
a. as a microprocessor
b. as a dynamic memory
c. to realize sequential logic
d. to realize a combinational logic

Ans. (d)
PLA is a fixed architecture logic device with programmable AND gates followed by programmable OR gates.
PLA can be used to implement a complex combinatorial circuits.


12. A dynamic RAM consists of
a. 6 transistors
b. 2 transistors and 2 capacitors
c. 1 transistors and 1 capacitors
d. 2 capacitors only

Ans. (c);
It uses one transistor and a capacitor. In this data bit is stored in a small capacitor rather than in a latch used for SRAM cell. SRAM cell requires six transistors. This allows DRAM to have very high density in comparison to SRAM.
Its limitation is that it requires periodic refreshing. This needs additional circuitry.


13. Each cell of a static Random Access Memory contains
a. 6 MOS transistors.
b. 4 MOS transistors and 2 capacitors
c. 2 MOS transistors and 4 capacitors
d. 1 MOS transistors and 1

Ans. (a);
CMOS SRAM memory cell requires six MOS transistor. Each bit is stored in SRAM on four MOS transistors (2 NMOS and 2 PMOS) forming two cross coupled inverters. Two additional transistors are required to control access to a storage cell for read write operations.


14. An 8085 microprocessor based system uses a 4𝐾×8𝑏𝑖𝑡 RAM whose starting address is AA00 H. The address of the last byte in this RAM is
a. 0FFF H
b. 1000 H
c. B9FF H
d. BA00 H

Ans. (c);
For 4K RAM there are 12 Address lines (212)
Starting Address

AA00 =                                    1010 1010 0000 0000 H
Add 4K                                                     1111 1111 1111 H
                                                        1011 1001 1111 1111 H
                                                              B 9 F F H
Address of last byte will be B9FF H

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